When a main power fail is detected in a system, a pre-charged standby capacitor acts as a temporary power supply so that a controller device can copy data from volatile memory (for example, DRAM) into flash memory, thereby preserving it. On the resumption of main power, the backed up data can then be read from flash memory and restored back into the volatile memory.
There are several solutions which attempt to deal with, in one way or another, the main failure of flash technology, namely the wearing out of flash blocks after a certain number of erasures and programs. They deal with this failure by using wear-leveling algorithms to determine which blocks have had the least number of erasures/program cycles, thereby determining which blocks most likely can be written successfully. Wearing out of blocks is of particular concern in NAND flash technology, although this may also be of concern in NOR flash technology.
The drawback with these solutions is that despite using wear-leveling algorithms, flash page program errors may still occur during back-up. Once the back-up mechanism has begun, i.e. once the system is dependent upon the standby capacitor for power, and if a page program unexpectedly fails within a block, these solutions must spend valuable time erasing a fresh block to replace this previously unknown corrupt block. Otherwise, there may not be enough good blocks to back up all the desired data. The capacitor can only keep the system alive for a limited time. Block erases take significant time which could have been spent actually backing up the data. In addition, these solutions do not provide for the scenario where one or more (but not all) of the available flash devices fail completely. This is why a more adaptive back-up method is needed.
Therefore, there is a need in the art to address the aforementioned problems.